[2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices] Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)

바로가기 메뉴: 본문 바로가기; 푸터 바로가기

서울대학교

TOP

Home · [2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices] Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)

[2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices] Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)

기간

June 25-27, 2007

참가자

Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park

대회명

2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices

Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, “Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)”, 2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Gyeongju, Korea, pp. 247-250, June 25-27, 2007

[2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices] Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)

DRL