[2009 SNW] Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High P

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Home · [2009 SNW] Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High P

[2009 SNW] Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High P

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Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Jae Hyun Park, Garam Kim, Hyun Woo Kim, Atteq Ur Rehman, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, “Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High Performance and Low GIDL Current”, 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 51-52, June 13-14, 2009

[2009 SNW] Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High P

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