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[2012 SNW] 3-D stacked NAND flash memory having lateral bit-line layers and vertical gate

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대회명

Ju-Wan Lee, Min-Kyu Jeong, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, “3-D stacked NAND flash memory having lateral bit-line layers and vertical gate,” Silicon Nanoelectronics Workshop, pp. 93-94, Jun. 2012