Abstract: 

In this paper, intrinsic characteristics of gate-all-around (GAA) nanoplate (NP) vertical FET (VFET) were investigated for single and multichannel structure through 3-D technology computeraided design (TCAD) simulations. The vertical device has strong immunity for the unprecedented short channel effects (SCE) and intrinsic gate delay compared with the lateral device owing to the flexible expansion channel in vertical direction. The proposed single and multi-channel NP VFETs (NP height = 40 nm) exhibit excellent characteristics with I_on/I_off > 105, subthreshold swing (SS) < 73 mV/decade, and draininduced barrier lowering (DIBL) < 60 mV/V.