Accurate evaluations of self-heating effects (SHEs) in highly down-scaled devices have become essential for improved performance and reliability of such devices. In this paper, SHEs in a triplestacked nanowire FETs (NWFETs) with trenched source drain structures, a structure which may be capable of obtaining a high on-current (I _on) in the 5 nm node, were analyzed through TCAD simulations. It was confirmed that trench methods for triple-stacked devices can effectively boost I _on if disregarding SHEs. However, because SHEs generated under high I _on prevent any increase of I _on, the trench steps should be adjusted appropriately considering the balance between the contact resistance and the SHEs. In order to obtain a proper trench depth, several steps were compared through a simulation. To support the results, the thermal resistance (R _th) was used in the comparison.