Abstract: 

A metal-oxide-semiconductor field-effect transistor (MOSFET) structure with a non-overlapped source-drain to T-gate is proposed to overcome the challenges in fabricating sub-30 nm complementary MOS (CMOS) devices. A high-κ spacer was adopted to induce effectively inversion layerin the non-overlapped region by using a fringing gate electric field, resulting in the suppression of the short-channel effects (SCEs). T-gate is used to reduce the gate resistance and to induce more carriers in the non-overlapped region to increase current drivability. The key device characteristics, including internal physics, were investigated by using extensive simulations. Compared to a conventional overlapped structure, the proposed structure has potential for the further scaling down.