Abstract: 

The gate conduction mechanisms in polysilicon-oxide-nitride-oxide-silicon (SONOS) transistors for non-volatile dynamic random access memory (DRAM) having lightly-doped drain (LDD) structure have been investigated by utilizing the threshold voltage shift (Vth) method. It is found that the gate conduction in SONOS transistors is mainly determined by a specific tunneling process depending on the voltage drop (VOX) across the tunnel oxide. It is also shown that the gate conduction mechanism through the ONO dielectric makes a smooth transition from one tunneling process to another according to the relationship between the VOX and tunneling barrier height (PHI_B).