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[2024 MRS] Processing and Characterization of Polycrystalline Silicon for Ultra-Low-Power Neuromorphic Applications
[2024 EDTM] A Compact Model for Program Operation of Gate-All-Around Barrier-Engineered Charge-Trapping NAND Flash Memories
[2024 EDTM] A Compact Model-Based Threshold Voltage Distribution Simulation of 3D Gate-All-Around (G
[2023 ITC-CSCC] Analysis of Vth distribution based on physical parameter variation for 3-D TLC NAND
[2021 SNW] Semi-Analytical Model of Subthreshold Current for Macaroni Channel MOSFET
[2021 SNW] New Read Schemes to Reduce Read Disturbance Due to HCI in Full Boosting Channel 3-D NAND
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