The channel width dependence of hot electron injection program/hot hole erase cycling behavior in silicon-oxide-nitride-oxide-silicon (SONOS) memories is investigated. While the trapped charge profile-dependent overerasure is observed in 10-μm-wide device, it is suppressed in 0.22-μm-wide device. Both the overerasure suppression and gradual positive threshold voltage shift in narrow device are explained as an elevated hot hole injection efficiency followed by more pronounced redistribution of the hole profile in the channel-center and the suppression of the lateral migration of injected holes in the channel-edge, by combining the measured endurance characteristics and TCAD simulation results. Main physical mechanisms are three-dimensional distribution of the electric field by gate/drain voltage, increasing interface states, and their trapped charge with cycling in the channel-edge.