We compare three dominant mechanisms in two generations of NAND Flash main chips for mass production. In addition, we analyze the charge loss behaviors of each mechanism according to cycling times. As a result, we confirm that as NAND Flash memory is scaled down, the portion of the interface trap recovery mechanism increases and the sensitivity of cycling times also increases. In the detrapping mechanism, while the charge loss of next generation is more sensitive on cycling times, the amplitude of the charge loss is larger in the current generation. Simultaneously, when the program operation is performed, the number of electrons injected into the floating gate decreases as the physical size of the device decreases. It lowers the portion of the trap-assisted tunneling mechanism and its trend is also accelerated actively as the cycling times increase.