In this article, a physically based grain boundary (GB) barrier height ( ψB ) model with temperature ( T ) dependence is developed for poly-Si channel macaroni MOSFETs. Experimental data of 3-D NAND flash string current are employed to calibrate a computer aided design (TCAD) simulation tool. ψB is then extracted from the macaroni MOSFETs with a single GB located at the center of the channel as a simulation structure, which is used to verify the ψB model. In order to model the temperature dependence, ψB is derived without approximation of Fermi-Dirac distribution function. The ψB model is compared with simulated ψB to validate the model over a wide temperature range as well as a gate bias ( VGS ), and a good agreement between them is achieved. In addition, we investigate the contributions of the surface potential inside grain, ψS , and the surface potential at GB, ψGB , to the reduction of ψB with increasing temperature.